Computer Vision Development in Seoul

Manufacturing / Semiconductor Memory

A Korean memory semiconductor manufacturer (top-3 global DRAM and NAND producer, KRW 55T annual revenue, 8 fabrication facilities — producing advanced DRAM and 3D NAND memory chips on processes from 1Xnm to EUV-based nodes) needed next-generation computer vision to improve wafer inspection, accelerate defect root cause analysis, and increase yield on advanced process nodes. (1) Inspection data volume: each fab generated 50TB of inspection image data per day — from optical inspection tools, e-beam inspection, and review SEM stations. The existing defect classification system (rule-based) classified only 65% of detected defects — the remaining 35% were classified as "unknown" and required manual review by yield engineers. With 8 fabs producing millions of wafers per year, the volume of "unknown" defects overwhelmed the engineering team. (2) Nuisance defects: 40% of detected defects were nuisance (false positives) — process artifacts or normal variation flagged as defects by the optical inspection tools. Each nuisance defect consumed engineering attention unnecessarily and slowed the feedback loop between detection and root cause resolution. Distinguishing real defects from nuisance required visual analysis that the rule-based system could not perform accurately. (3) Yield ramp on new nodes: transitioning to each new process node (from 1Y to 1Z to EUV) required months of yield improvement — identifying and eliminating systematic defects that reduced yield from initial levels (often below 50%) to production targets (above 90%). The speed of yield ramp directly affected time-to-market and revenue — each week of delayed ramp cost approximately KRW 150B in lost production value. Faster defect identification and root cause analysis accelerated yield ramp. (4) Defect-to-cause correlation: connecting inspection results (what the defect looks like) to root cause (which process step and equipment caused it) required experienced yield engineers who could recognise defect signatures. The manufacturer had 120 yield engineers across 8 fabs — but advanced node defects were increasingly subtle and required deep expertise. New engineers needed 2-3 years to develop defect recognition skills comparable to senior engineers. (5) Inline vs. offline: optical inline inspection (at production speed) detected most defects but could not classify them precisely. SEM review (offline, 1,000x slower) provided detailed classification but could only review a small sample of detected defects. The manufacturer needed AI that could classify defects from inline optical images with accuracy approaching SEM review — enabling classification of every detected defect rather than a statistical sample.

We developed and deployed a wafer inspection AI platform over 16 weeks. (1) Deep learning defect classification: CNN models trained on 180 million annotated defect images from the manufacturer's 5-year inspection history. Multi-scale architecture: models processing defect images at multiple resolutions — low-resolution for context (surrounding pattern, defect location on die) and high-resolution for detail (defect morphology, texture, and edge characteristics). Classification: 45 defect categories covering all major yield-limiting defect types — particles, pattern defects (bridging, breaks, missing patterns), process defects (residue, under-etch, over-etch), scratch types, and contamination. From inline optical: the models achieved 89% classification accuracy from inline optical images (approaching the 94% accuracy from SEM review — a dramatic improvement from the 65% rule-based classification rate). The 35% "unknown" category reduced to 8% — with the remaining 8% being genuinely ambiguous defects requiring SEM review. (2) Nuisance filtering: dedicated ML model distinguishing real defects from nuisance — trained on the 40% of detections that were confirmed nuisance through SEM review. The model filtered 92% of nuisance defects automatically (from 0% — all nuisance previously required manual review). False rejection rate (real defects filtered as nuisance): 0.3% — acceptable given the volume reduction in manual review workload. Net effect: yield engineers reviewed 55% fewer defect images — focusing their attention on the most impactful real defects. (3) Root cause correlation: defect signature analysis — the AI system identified visual signatures that correlated with specific process equipment and conditions. Equipment fingerprinting: each etch chamber, deposition tool, and lithography scanner produced characteristic defect patterns — the AI learned these patterns and could attribute defects to specific equipment with 82% accuracy (vs. 60% accuracy for experienced engineers working from optical images alone). Process drift detection: the system detected gradual changes in defect morphology that indicated process drift — alerting engineers before the drift produced yield-impacting defect rates. (4) Yield ramp acceleration: new node learning — when a new process node entered production, the AI system rapidly learned new defect categories from the initial wafers. Transfer learning: models pre-trained on prior nodes and fine-tuned on new node data — achieving useful classification within 2 weeks of production start (vs. 2-3 months to develop rule-based classifiers for new nodes). Defect priority: automated ranking of defect categories by yield impact — ensuring engineering resources focused on the defects with the largest yield effect. (5) Federated learning across fabs: models improved through data from all 8 fabs without centralising sensitive manufacturing data. Each fab trained local models that contributed learning (not data) to a global model — maintaining IP security while benefiting from the full diversity of defect examples across the manufacturing network.

Classification accuracy: from 65% (rule-based) to 89% (deep learning) from inline optical images — approaching SEM-level classification without the throughput penalty. Unknown defects: from 35% to 8% — dramatically reducing the manual classification burden. Nuisance reduction: 92% of nuisance defects filtered automatically — yield engineers reviewing 55% fewer images while focusing on higher-impact real defects. Root cause: equipment attribution accuracy from 60% to 82% — accelerating the defect-to-fix cycle. Average time from defect detection to root cause identification reduced from 5 days to 1.5 days. Yield improvement: 0.4% yield improvement on mature nodes (worth KRW 220B annually at the manufacturer's production scale). Yield ramp on new nodes accelerated by 3 weeks — worth approximately KRW 450B per node transition in additional production value (the manufacturer transitions nodes every 18-24 months). Engineering efficiency: 120 yield engineers maintained across 8 fabs (no reduction — but handling 3x more complex analysis as advanced nodes required deeper investigation). New engineer ramp-up: from 2-3 years to 8-12 months — AI-assisted analysis accelerated learning by providing classification explanations and defect-to-cause suggestions. Annual value: KRW 450B (yield ramp acceleration — 3-week improvement on new node transitions), KRW 220B (mature yield improvement — 0.4% yield increase on established production), KRW 85B (engineering efficiency — faster root cause analysis and reduced nuisance review enabling more productive use of 120 yield engineers), KRW 35B (SEM review reduction — reduced offline SEM sampling requirements through improved inline classification) = KRW 790B (approximately USD 600M). Development cost: KRW 8.2B (approximately USD 6.3M). Payback: under 4 days.